A Venn diagram represents Boolean variables as overlapping circles inside a rectangle (the universe). Each region corresponds to one minterm of the truth table: inside circle $x$ = "x is 1", outside = "x is 0". The intersection of two circles = AND; the union = OR; the area outside a circle = NOT.

Two-variable Venn (4 regions = 4 truth-table rows):

Three-variable Venn (8 regions = 8 truth-table rows):

Operators visually:

Use: shade LHS and RHS separately — if the shaded patterns match, the identity is proven.

Setup: a conveyor moves gumballs past three sensors:

• $s_1 = 1$ if the gumball is too light (weight sensor)
• $s_2 = 1$ if the gumball is too small (diameter sensor)
• $s_3 = 1$ if the gumball is too large (diameter sensor)

A trap door rejects the gumball when output $f = 1$. Reject rule: reject if it is too large, OR (too small AND too light).

Figure 2.21a — conveyor schematic:

Figure 2.21b — truth table:

Example 2.7 derivation (the original textbook approach):

SOP from minterms: $f = \overline{s_1}\overline{s_2}s_3 + \overline{s_1}s_2 s_3 + s_1\overline{s_2}s_3 + s_1 s_2\overline{s_3} + s_1 s_2 s_3$

Replicate the $s_1 s_2 s_3$ term (rule 7b), then group:

$= \overline{s_1}s_3(\overline{s_2}+s_2) + s_1 s_3(\overline{s_2}+s_2) + s_1 s_2(\overline{s_3}+s_3) = \overline{s_1}s_3 + s_1 s_3 + s_1 s_2$

Combine the first two terms: $f = s_3 + s_1 s_2$

What problem 2.19 asks: show a different simplification path that ends at the same result. Repeat the term $s_1 s_2\overline{s_3}$, then factor by $\overline{s_3}$:

$f = s_3(\overline{s_1}\overline{s_2}+\overline{s_1}s_2+s_1\overline{s_2}+s_1 s_2) + s_1 s_2(\overline{s_3}+s_3) = s_3 \cdot 1 + s_1 s_2 = s_3 + s_1 s_2$

The bracketed sum spans every valuation of $(s_1, s_2)$, so it equals 1. Same result, different route — illustrating that algebraic minimization isn't unique.

Yes — NOR is functionally complete: every Boolean function can be built using only NOR gates. Three base recipes:

NOT — one NOR with both inputs shorted: $\mathrm{NOR}(x, x) = \overline{x+x} = \overline{x}$.

OR — two NORs (NOR followed by inverter): $x + y = \overline{\overline{x+y}} = \mathrm{NOR}(\mathrm{NOR}(x, y), \mathrm{NOR}(x, y))$.

AND — three NORs (two inverters + one NOR), via DeMorgan: $x \cdot y = \overline{\overline{x} + \overline{y}} = \mathrm{NOR}(\overline{x}, \overline{y})$.

Summary — gate counts:

Once you have NOR, every other gate (and any function whatsoever) follows. The same is true for NAND alone — both are single-gate universals, which is why CMOS gate libraries are typically built around them.

Application to problem 2.24: $f = (\overline{x_1}+x_2)(x_2+\overline{x_3})$ — already in 2-level POS form, which maps directly to a 2-level NOR-NOR network:

1. NOR_a: $\mathrm{NOR}(x_1, x_1) = \overline{x_1}$  (inverter)
2. NOR_b: $\mathrm{NOR}(x_3, x_3) = \overline{x_3}$  (inverter)
3. NOR1: $\mathrm{NOR}(\overline{x_1}, x_2) = \overline{\overline{x_1}+x_2}$  (first sum, inverted)
4. NOR2: $\mathrm{NOR}(x_2, \overline{x_3}) = \overline{x_2+\overline{x_3}}$  (second sum, inverted)
5. NOR3: $\mathrm{NOR}(\mathrm{NOR1}, \mathrm{NOR2}) = (\overline{x_1}+x_2)(x_2+\overline{x_3}) = f$  (re-inverts and ANDs by DeMorgan)

Total: 5 NOR gates.

Setup. Two 4-variable functions $f_1$ and $f_2$ are to be implemented in a single combined circuit (shared gates where possible).

Figure 2.64a / 2.64b — K-maps:

Example 2.16 — minimum SOP (with sharing)

$f_1 = \overline{x_1}\,\overline{x_3} + x_1 x_3 + \overline{x_2} x_3 x_4$

$f_2 = \overline{x_1}\,\overline{x_3} + x_1 x_3 + x_2 \overline{x_3} x_4$

The first two product terms are identical → those AND gates are shared in Figure 2.64c. Combined cost: 6 gates / 16 inputs = 22 (versus 28 for two separate circuits).

Example 2.18 — minimum POS (problem 2.29's task)

$f_1 = (x_1 + \overline{x_3})(\overline{x_1} + x_3)(\overline{x_1} + \overline{x_3} + x_4)$

$f_2 = (x_1 + \overline{x_3})(\overline{x_1} + x_3)(\overline{x_1} + \overline{x_3} + \overline{x_4})$

The first two sum terms are common (could be shared), but the K-maps reveal no 0-cell grouping that simultaneously appears in both functions — so beyond those two shared OR gates, no additional sum terms can be merged advantageously. Each function still needs three OR gates + one AND gate + 11 inputs ≈ 30 total (or ~26 if you share the two common sum-term ORs).

Conclusion: 22 (SOP, shared) < 26–30 (POS) — for these particular K-maps, the SOP form admits more sharing because the 1-cells cluster into product terms that overlap, while the 0-cells don't cluster compatibly. This is highly function-dependent — Example 2.17 (Figure 2.65, $f_3, f_4$) shows the opposite ordering can occur.

Note on Figure 2.65: that figure illustrates the same trade-off for a different pair $f_3, f_4$ where the textbook compares prime-implicant-only realizations against intentionally-shared non-prime implicants — see Example 2.17 / 2.19 (different problem in the study guide, not this one).

Setup. Two 4-variable functions $f_3$ and $f_4$ are to be implemented as a single combined circuit. Whereas Example 2.16 used only prime implicants and shared the obviously-common ones, Example 2.17 deliberately uses some non-prime implicants to expose more sharing opportunities.

Figure 2.65a / 2.65b — K-maps:

Example 2.17 — minimum SOP using only prime implicants:

$f_3 = \overline{x_1}x_4 + x_2 x_4 + x_1 x_2 x_3$

$f_4 = \overline{x_1}\overline{x_2}\overline{x_4} + x_1 \overline{x_2} \overline{x_3} + x_1\overline{x_4}$  (or equivalent — six AND gates total, no AND can be shared)

Combined cost with no sharing: 6 ANDs + 2 ORs + 21 inputs = 29.

Example 2.17 — better SOP using shared non-prime implicants:

$f_3 = \overline{x_1}x_2 x_4 + x_1 x_2 x_3 \overline{x_4} + \overline{x_1}x_4$

$f_4 = \overline{x_1}x_2 x_4 + x_1 x_2 x_3 \overline{x_4} + x_2\overline{x_4}$

Now the first two product terms are identical in both expressions and can share AND gates. Combined cost: 6 gates + 17 inputs = 23 — a 6-input saving over the prime-implicant realization.

Example 2.19 — minimum POS for the same pair (problem 2.30 asks this):

$f_3 = (x_3 + x_4)(x_2 + x_4)(x_1 + x_4)(\overline{x_1} + x_2)$

$f_4 = (x_3 + x_4)(x_2 + x_4)(x_1 + x_4)(\overline{x_1} + x_2 + \overline{x_4})$

The first three sum terms are identical in both functions — three shared OR gates costing six inputs. Plus one 2-input OR and one 4-input AND for $f_3$, and one 3-input OR and one 4-input AND for $f_4$. Combined cost: 5 ORs + 2 ANDs + 19 inputs = 26.

Comparison:

Lesson: SOP with intentionally-non-minimum (shared) implicants beats POS for this pair. The choice of SOP vs POS, and prime-vs-shared implicants, depends on the K-map geometry — modern synthesis tools explore both.